A Satisfiability Algorithm for AC0
Abstract
We consider the problem of efficiently enumerating the satisfying assignments to 0 circuits. We give a zero-error randomized algorithm which takes an 0 circuit as input and constructs a set of restrictions which partition \0,1\n so that under each restriction the value of the circuit is constant. Let d denote the depth of the circuit and cn denote the number of gates. This algorithm runs in time |C| 2n(1-μc.d) where |C| is the size of the circuit for μc,d 1/[ c + d d]d-1 with probability at least 1-2-n. As a result, we get improved exponential time algorithms for 0 circuit satisfiability and for counting solutions. In addition, we get an improved bound on the correlation of 0 circuits with parity. As an important component of our analysis, we extend the Hstad Switching Lemma to handle multiple and .
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