Non-Fault Tolerant T-Gates for the [7,1,3] Quantum Error Correction Code

Abstract

We simulate the implementation of a T-gate, or $\frac{\pi}{8}$-gate, for a [7,1,3] encoded logical qubit in a non-equiprobable error environment. We demonstrate that the use of certain non-fault tolerant methods in the implementation may nevertheless enable reliable quantum computation while reducing basic resource consumption. Reliability is determined by calculating gate fidelities for the one-qubit logical gate. Specifically, we show that despite using a non-fault tolerant procedures in constructing a logical zero ancilla to implement the T-gate the gate fidelity of the logical gate, after perfect error correction, has no first order error terms. Meaning, any errors that may have occurred during implementation are `correctable' and fault tolerance may still be achieved.