Complementary Skyrmion Racetrack Memory with Voltage Manipulation

Abstract

Magnetic skyrmion holds promise as information carriers in the next-generation memory and logic devices, owing to the topological stability, small size and extremely low current needed to drive it. One of the most potential applications of skyrmion is to design racetrack memory (RM), named Sk-RM, instead of utilizing domain wall (DW). However, current studies face some key design challenges, e.g., skyrmion manipulation, data representation and synchronization etc. To address these challenges, we propose here a complementary Sk-RM structure with voltage manipulation. Functionality and performance of the proposed design are investigated with micromagnetic simulations.