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Cryogenic Subthreshold Swing Saturation in FD-SOI MOSFETs described with Band Broadening

Abstract

In the standard MOSFET description of the drain current ID as a function of applied gate voltage VGS, the subthreshold swing SS(T) dVGS/d ID has a fundamental lower limit as a function of temperature T given by SS(T) = 10~kBT/e. However, recent low-temperature studies of different advanced CMOS technologies have reported SS(4K or lower) values that are at least an order of magnitude larger. Here, we present and analyze the saturation of SS(T) in 28nm fully-depleted silicon-on-insulator (FD-SOI) devices for both n- and p-type MOSFETs of different gate oxide thicknesses and gate lengths down to 4K. Until now, the increase of interface-trap density close to the band edge as temperature decreases has been put forward to understand the saturation. Here, an original explanation of the phenomenon is presented by considering a disorder-induced tail in the density of states at the conduction (valence) band edge for the calculation of the MOS channel transport by applying Fermi-Dirac statistics. This results in a subthreshold ID eeVGS/kBT0 for T0=35K with saturation value SS(T<T0) = 10~kBT0/e. The proposed model adequately describes the experimental data of SS(T) from 300 down to 4K using kBT0 3meV for the width of the exponential tail and can also accurately describe SS(ID) within the whole subthreshold region. Our analysis allows a direct determination of the technology-dependent band-tail extension forming a crucial element in future compact modeling and design of cryogenic circuits.

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