High Performance Three-Terminal Thyristor RAM with a P+/P/N/P/N/N+ Doping Profile on a Silicon-Photonic CMOS Platform

Abstract

3T TRAM with doping profile (P+PNPNN+) is experimentally demonstrated on a silicon photonic platform. By using additional implant layers, this device provides excellent memory performance compared to the conventional structure (PNPN). TCAD is used to reflect the physical behavior, and the high-speed memory operations are described through the model.