A Technical Survey of Sparse Linear Solvers in Electronic Design Automation

Abstract

Sparse linear system solvers ($Ax=b$) are critical computational kernels in Electronic Design Automation (EDA), underpinning vital simulations for modern IC and system design. Applications like power integrity verification and electrothermal analysis fundamentally solve large-scale, sparse algebraic systems from Modified Nodal Analysis (MNA) or Finite Element/Volume Method (FEM/FVM) discretizations of PDEs. Problem dimensions routinely reach $10^6-10^9$ unknowns, escalating towards $10^{10}$+ for full-chip power grids \cite{Tsinghua21}, demanding stringent solver scalability, low memory footprint, and efficiency. This paper surveys predominant sparse solver paradigms in EDA: direct factorization methods (LU, Cholesky), iterative Krylov subspace methods (CG, GMRES, BiCGSTAB), and multilevel multigrid techniques. We examine their mathematical foundations, convergence, conditioning sensitivity, implementation aspects (storage formats CSR/CSC, fill-in mitigation via reordering), the critical role of preconditioning for ill-conditioned systems \cite{SaadIterative, ComparisonSolversArxiv}, and multigrid's potential optimal $O(N)$ complexity \cite{TrottenbergMG}. Solver choice critically depends on the performance impact of frequent matrix updates (e.g., transient/non-linear), where iterative/multigrid methods often amortize costs better than direct methods needing repeated factorization \cite{SaadIterative}. We analyze trade-offs in runtime complexity, memory needs, numerical robustness, parallel scalability (MPI, OpenMP, GPU), and precision (FP32/FP64). Integration into EDA tools for system-level multiphysics is discussed, with pseudocode illustrations. The survey concludes by emphasizing the indispensable nature and ongoing evolution of sparse solvers for designing and verifying complex electronic systems.