An Electronic Ising Machine

Abstract

We develop a custom printed circuit board (PCB) for a low-power and high-speed accelerator of NP-Hard graph problems. The architecture implements an annealing-based computing paradigm using a network of nonlinear electronic oscillators whose phase dynamics converge to stable configurations that encode solutions. We review the theoretical framework, and present our circuit design, simulations, and experimental results. We further highlight some key future research directions for the emerging developing of computing architectures based on energy minimization.