Hybrid physical/logical zero-noise extrapolation with limited logical executions

Abstract

Before full fault tolerance, partially error-corrected logical executions may be available but costly. We formulate zero-noise extrapolation as a statistical-design problem in which the physical/logical execution mode is an extrapolation variable. Logical circuits provide low-noise anchors, while physical folded circuits supply a cheaper noise lever arm. In a calibrated $p_L=γp$ model, we derive Richardson variance prefactors, folded-circuit runtime ratios, optimal shot allocation, and bias--variance criteria. We demonstrate that for $γ\lesssim0.1$, the mixed strategy can substantially reduce runtime under the stated resource model.