Extended Frege proofs, circuits and rewriting
Abstract
Inspired by a statement about Extended Frege proof systems by Jain and Jin (FOCS 2022) we prove that: - there is a p-time binary relation ≈ between circuits that implies their logical equivalence, - the relation ≈ implies that each of the two circuits can be rewritten into the other one by possibly deleting some gates and adding at most seven new gates, - if the equivalence C D has a size s proof in an Extended Frege or a Circuit Frege proof system then there is a chain of circuits Ei C = E0 ≈ … ≈ Et = D with t sO(1).
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