Fewer Histories, Faster Paths: Distributed Quantum Circuit Feynman Simulation via History Reduction, Checkpointing, and Pruning
Frej Larssen, Luca Pennati, Erik M. Åsgrim, Ivy Peng, Stefano Markidis
Abstract
We present a distributed method for exact sparse-output quantum circuit simulation based on the pure Feynman sum-over-histories formulation. The method computes selected computational-basis amplitudes exactly and addresses the exponential growth of the path sum through a reduced history formulation based on internal-wire assignments, determinism propagation, artificial sources, pruning, and checkpointed reuse. Boundary constraints are propagated through deterministic and wire-preserving gates, and explicit branching variables are introduced only where residual ambiguity remains. Shared work across related histories is captured via an autotuned checkpointed partition. The parallel execution model combines decomposition over requested outputs with concurrent history evaluation, while a dynamic server-worker architecture mitigates load imbalance from irregular branching and pruning. Across the circuit families studied, the method adapts to different structural regimes of the reduced history space: zero artificial sources for QFT under backward analysis, substantial speedups from checkpointing and autotuning for amplitude amplification, and a runtime-fidelity tradeoff from threshold pruning for QAOA. On quantum walk circuits, it reconstructs exact selected-output distributions up to 100 qubits and achieves 85% parallel efficiency on 8,192 CPU cores of a supercomputer.
Create a lesson
Related papers
Co-occurrence-Aware Quadratic Assignment for Local Feature Matching in Simultaneous Localization and Mapping
Yutaka Yamada, Yohei Hamakawa, Yutaro Ishigaki et al.
Composability rather than computation sets the cost of an analog EML hardware fabric
C. Teuscher
A Hybrid Quantum-Classical Coordination Architecture for Portfolio Optimization via Global Context Injection
Xiaoguang Yang, Menghan Dou, Guoping Guo
A Game-Theoretic Framework for Incentive-Compatible AI training Under Renewable-Energy Constraints
Konstantinos Varsos, Ramin Khalili, Adamantia Stamou et al.
System-Technology Co-Evaluation of A7 CFET and A10 NSFET Technologies from Cell Parasitics to Chip Reliability
Mahdi Benkhelifa, Leon Mayr, Hadi Nour Eddine et al.
Feasibility and Memory Mechanisms of Chern-Simons Context Reservoir Computation
Jyotiranjan Beuria, Venkatesh H. Chembrolu