Towards Terabit/$λ$/s Multidimensional Silicon Photonic Engine

Abstract

Increasing artificial intelligence (AI) workloads drive co-packaged optics (CPO), which integrates optical engines with electronic components. Optical interconnects can extend transmission distances and reduce latency, allowing distributed clusters in AI factories to operate as a unified computational unit. However, escalating data throughput necessitates greater parallelization of light within ultracompact form factors while maintaining stringent energy efficiency and latency constraints. Here, we present a multidimensional silicon photonic engine that achieves a communication capacity exceeding 1.8 terabit/s/lambda/s. By monolithically integrating transceivers, spatial and polarization (de)multiplexers, and optical signal processors on a single chip, we eliminate bulky discrete (de)multiplexers and power-hungry digital signal processing (DSP). In experiments, the photonic engine can be self-configured to identify two, four, or six concurrent spatial and polarization channels per fiber while mitigating dynamic channel crosstalk. Compared with the state-of-art DSP, our approach achieves >5,000-fold reductions in both power consumption and processing latency at a MIMO processing order of six. Furthermore, we demonstrate full-duplex, modulation-format-transparent inter-chip communication over 300-meter fiber. These results represent a paradigm shift for optical engines in future high-performance computing and AI-driven data centers.