T-efficient unitary synthesis via block-sparse Hamiltonian simulation
Diyi Liu, Shuchen Zhu, Wibe Albert de Jong, Di Fang, David Williams-Young, Chao Yang
Abstract
We construct Clifford+T circuits implementing arbitrary n-qubit unitaries with worst-case T-count O(N8/7) at constant operator-norm error, where N=2n, improving the previous exponent 5/4. The construction uses O(N6/7) clean ancillas. The main idea is to reduce the data addressed by each query to the block-encoding circuit for a sparse piece while controlling the additional simulation work needed to combine the pieces. We simulate a Hermitian logarithm of the target by flattening its traceless part with a two-layer random similarity transformation, randomly partitioning the transformed generator into block-sparse Hermitian pieces, and combining their evolutions using qDRIFT. For a target operator-norm error ε∈(0,1/2), let L=2(N/ε), the qubit count plus the requested bits of accuracy. By successively correcting the approximation error, we obtain a circuit using O(N8/7L3/7+NL) T gates and O(N) clean ancillas whenever L N. We also prove that, at constant precision, the exponent 8/7 is optimal within a sequential block-SELECT model.
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