NN-Based FeFET Compact Modeling for SPICE Simulation

Abstract

Prototyping and early-stage circuit evaluation for emerging transistor technologies require fast and accurate compact models for SPICE simulations. Standard physics-based compact models, such as BSIM, offer high fidelity but demand extensive domain expertise and time-consuming equation formulation for every new physical effect, significantly slowing technology development. Neural network (NN)-based models offer a scalable alternative approach, but they rely heavily on smooth numerical solver data with explicit high-order derivative information. However, measurement data suffers from complex noise patterns, making derivative extraction challenging and complicating NN-based transistor modeling. This work presents a derivative-free NN training framework employing spectral normalization to naturally smooth derivative behavior and filter measurement noise. Using drain current measurements from a fabricated 28 nm ferroelectric device, we design an NN-based compact model that captures the full spectrum of polarization amplitudes and supports dynamic polarization switching in transient simulations. To demonstrate its capability, we deploy the model in a commercial SPICE software to simulate write and read operations for large-scale memory arrays with up to 512x512 size, including parasitic effects. Our approach bridges raw measurements with NN-based SPICE-compatible transistor modeling, significantly reducing model development time and enabling rapid circuit-level prototyping for emerging devices.