STM study of single phosphorus incorporation into silicon by heating PBr3 on Si(100)
Tatiana V. Pavlova, Vladimir M. Shevlyuga
Abstract
The objective of miniaturizing doped areas in silicon, with the ultimate goal of achieving atomic-precision doping, requires a fundamental understanding of the dopant incorporation process at the atomic level. We present a combined scanning tunneling microscopy (STM) and density functional theory (DFT) investigation of single phosphorus atom incorporation into the Si(100) surface. Phosphorus was supplied via PBr3 molecules, which completely dissociate on Si(100) at room temperature. By performing in situ annealing within the STM, we directly tracked the same phosphorus atom before and after heating. Upon annealing, the P atom undergoes an exchange with a nearby Si atom, forming a stable P-Si-Br complex with a Br atom located atop the Si atom of the heterodimer. The activation barrier calculated using DFT is consistent with our observation of doping starting at temperatures as low as 175 C. These results provide detailed atomic-scale insight into the phosphorus incorporation pathway and offer a foundation for improving methods of precise, single-atom doping in silicon.
Create a lesson
Related papers
Nanoscale Sr2IrO4 Freestanding Thin-Films for Flexible Electronics
Sujan Shrestha, Matthew Coile, Menglin Zhu et al.
Impact of Chemical Clustering on the Structural, Topological, and Functional Properties of Ba(ZrxTi1-x)O3: An Atomistic Simulation Study
Matias Baldassin, Rodrigo Machado, Marcelo Sepliarsky et al.
Correlations of Spectroscopic and Dielectric Properties of Hafnia-Zirconia Nanoparticles
Yuriy O. Zagorodniy, Eugene A. Eliseev, Petr Jiricek et al.
Face-to-face anneal temperature controls lattice parameter in Ta(C,N) virtual substrates for AlGaN power electronics
Noah Zahn, Julia L. Martin, Michelle A. Smeaton et al.
Scandium diboride: a semi-metallic, lattice, thermally matched substrate for vertical AlGaN power electronics
MVS Chandrashekhar, Daniel Joel Harrison, Ahamed Raihan et al.
III-V antiphase boundaries are not generated by Si or Ge substrate step edges
Charles Cornet, Sreejith Pallikkara Chandrasekharan, Audrey Gilbert et al.