On-chip Bragg peak extraction from MHz frame rate X-ray detectors using a cellular automaton architecture
S. Fowler, S. Strempfer, D. Beniwal, M. Hammer, H. Shi, S. Gnanasekaran, N. Contini, T. Guruswamy, Y. Chen, L. Rota, D. Doering, A. Dragone, T. Zhou, M. Cherukara, K. Yoshii, A. Miceli
Abstract
High-frame rate pixel detectors can produce data volumes that exceed available off-chip bandwidth, yet in many applications only a sparse subset of each frame carries relevant information. Spatially localized events, including diffraction peaks in crystallography, particle hits in tracking detectors, fluorescence spots in biological imaging, and other applications, all require that clusters of above-threshold pixels be identified and extracted from an otherwise featureless background. Conventionally this is performed in software algorithms such as connected-component labeling on full frames, but at MHz frame rates the resulting throughput becomes prohibitive. We present a lightweight hardware architecture that performs peak localization and patch extraction directly in the sensor silicon, transmitting only small pixel patches rather than complete frames. FPGA-based testing on an AMD Alveo V80 validated the synthesizability and timing closure of the peak-finding module in real hardware. The design replaces global connected-component labeling with a cellular automaton that uses purely local, fixed-iteration neighborhood operations, eliminating the label storage and equivalence-resolution logic that make conventional approaches impractical on-chip. We validate the architecture on X-ray Bragg peak detection for far-field high-energy diffraction microscopy and show that every peak found by a software reference is recovered, with equivalent downstream reconstructions. The architecture sustains several-hundred-kHz frame rates in 130nm CMOS and exceeds 1MHz in 28nm.
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